Senior Layout Engineer (m/f/x)

Dresden
Senior Layout Engineer (m/f/x) Last Mile Semiconductor GmbH Dresden
60.000 € - 80.000 € annual
Home office available
Part-time possible
Flexible working hours
30 vacation days

Last Mile Semiconductor GmbH, a Dresden-based deep-tech startup, is developing the next generation of energy-efficient wireless connectivity solutions based on the new DECT NR+ standard. As a pioneer in the field of ultra-low-power RFICs and SoCs, we are shaping the future of IoT, Industry 4.0, and Massive Machine-Type Communication (mMTC). Our chips are based on modern CMOS and FD-SOI technologies and are used worldwide for scalable, robust, and cost-effective applications. To strengthen our team, we are looking for an experienced professional in the field of IC layout who will play a key role in the success of our tape-outs.


Your Role
As a Senior Layout Engineer, you will be responsible for the physical design of highly integrated RF and mixed-signal ICs—from the initial floorplan concept through to a successful tape-out. You’ll work closely with our RFIC, analog, digital, and systems teams, applying your expertise to complex layout challenges.


Your Responsibilities

  • Independent design of IC layouts for RF, analog, and mixed-signal blocks
  • Implementation of high-performance layout techniques (matching, symmetry, shielding, parasitic control)
  • Creating floorplans and block-level layouts for complex SoCs
  • Performing layout verification (DRC, LVS, ERC)
  • Setting up and operating advanced layout tools (parasitic extraction, electromigration, and IR drop)
  • Close collaboration with design engineers to optimize performance and yield
  • Analysis and debugging of layout-related issues during the verification and bring-up phases
  • Supporting tape-out activities
  • Contributing to the further development of layout guidelines and methodologies
  • Documentation and knowledge transfer within the team

Technologies & Standards

  • RFIC Design & Layout
  • Mixed-Signal IC Design
  • CMOS / FD-SOI Technologies (22FDX)
  • DECT NR+ Wireless Standard
  • EDA Tools: Cadence Virtuoso, Calibre (DRC/LVS/PEX), Assura
  • Parasitic Extraction & EM Awareness
  • Analog Layout Techniques: Matching, Common-Centroid, Guard Rings
  • Low-Power Design & Ultra-Low-Power Architectures
  • Tape-out Flow & Foundry Interfaces


Your Profile

  • Bachelor’s or master’s degree in electrical engineering, microelectronics, or a related field
  • Several years of experience in IC layout (analog / RF / mixed-signal)—ideally in an industrial setting
  • In-depth understanding of:
    • Layout parasitics and their impact on performance
    • Matching strategies and layout optimization
    • Substrate noise, crosstalk, and electromagnetic effects
  • Proficiency with Cadence layout tools and verification flows
  • Experience with advanced technology nodes (CMOS / FD-SOI) is a plus
  • Structured, precise, and quality-oriented approach to work
  • Ability to work well in teams and strong communication skills in interdisciplinary teams
  • Good command of English (German is a plus)

We offer:

Creative freedom & responsibility

  • Ample creative freedom and genuine ownership instead of micromanagement
  • Short decision-making paths and direct influence on strategic decisions
  • A visible contribution to the success of our product and company
  • The opportunity to play a key role in a growing deep-tech company
  • Contributing to a technology that can transform the future of wireless communication

Benefits

  • Employer contribution toward the Deutschlandticket or DVB Jobticket in the amount of €55.10 per month
  • Alternatively, an employer contribution toward the JobRad of €54.90 per month
  • Unlimited free access to the gym located right in the building
  • Retirement plan and disability insurance with contributions ranging from €100 to €200 per month

Flexibility & Work Environment

  • Flexible work hours with core hours from 10:00 a.m. to 3:00 p.m.
  • Hybrid work with a high degree of flexibility
  • Modern hardware and professional work equipment
  • Bright, modern office spaces in a central location in Dresden
  • Ergonomically designed workstations

Team & Culture

  • An international team with flat hierarchies and short lines of communication
  • Direct interaction with management and technical decision-makers
  • Colleagues who support one another and share knowledge
  • Lunch breaks together and regular team events
  • A corporate culture in which initiative and new ideas are actively encouraged

Employee benefits

Team eventsFlexible working hoursHigh-quality technical equipmenthome office optionFruit, vegetables, snacksPersonal feedback and development conversationsBikeleasingDiverse part-time optionsShower facilitiesdaycare support30+ vacation (flexible vacation planning)free gymJob ticketGood public transportation connectionsSubsidies for public transportationEmployee referral bonusemployee discounts through corporate benefitsStart-up spiritFree parkingOffer sports courses on siteDaycare subsidy
DECTNR+5GIOTMikrocontrollermicrocontrollerHardwaresmartStartupElektrotechnik
Ms. Jessica Hinkelmann
HR Manager

Location

This Job or job advertisement as 'Senior Layout Engineer (m/w/x)' is advertised for the following addresses: Bamberger Strasse 1, 01187 Dresden.

Short profile of the Last Mile Semiconductor GmbH

Based in Dresden, Germany – the heart of Silicon Saxony – we are a semiconductor startup for the breakthrough development of a new non-cellular 5G wireless chipset that enables secure massive IoT use cases.
Driven by a vision of a future where technology is seamlessly integrated into our daily lives, encompassing homes, industries, public spaces and healthcare, we strive to optimize resource and energy consumption while establishing global digital sovereignty. To realize this vision, we are actively developing a low-cost and ultra-low-power 5G wireless chipset based on the revolutionary NR+ non cellular private 5G standard.

Skills sought

R&DdatasecurityinformaticsTelecommunicationsRFIDsoftwaredesigndevelopment-engineerSystems-engineerSoftware-DesignembeddedITLinuxdigitalisationIoTIndustry 4.0Electrical-engineeringSemiconductor
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